Update the release notes for the 3.3 release.

    -help             - display available options (-help-hidden for more)

    -o <filename>     - Specify output filename

.. _grouping options into categories:

Grouping options into categories

--------------------------------

The '``llvm.used``' Global Variable

-----------------------------------

The ``@llvm.used`` global is an array which has

 :ref:`appending linkage <linkage_appending>`. This array contains a list of

pointers to global variables, functions and aliases which may optionally have a

pointer cast formed of bitcast or getelementptr. For example, a legal

use of it is:

The ``@llvm.used`` global is an array which has :ref:`appending linkage

<linkage_appending>`. This array contains a list of pointers to global

variables, functions and aliases which may optionally have a pointer cast formed

of bitcast or getelementptr. For example, a legal use of it is:

.. code-block:: llvm

.. contents::

    :local:

.. warning::

   These are in-progress notes for the upcoming LLVM 3.3 release.  You may

   prefer the `LLVM 3.2 Release Notes <http://llvm.org/releases/3.2/docs

   /ReleaseNotes.html>`_.

Introduction

============

Non-comprehensive list of changes in this release

=================================================

.. NOTE

   For small 1-3 sentence descriptions, just add an entry at the end of

   this list. If your description won't fit comfortably in one bullet

   point (e.g. maybe you would like to give an example of the

   functionality, or simply have a lot to talk about), see the `NOTE` below

   for adding a new subsection.

* The CellSPU port has been removed.  It can still be found in older versions.

* The IR-level extended linker APIs (for example, to link bitcode files out of

  examples of the new syntax. The old syntax using register classes still

  works, but it will be removed in a future LLVM release.

* ... next change ...

.. NOTE

   If you would like to document a larger change, then you can add a

   subsection about it right here. You can copy the following boilerplate

   and un-indent it (the indentation causes it to be inside this comment).

* MCJIT now supports exception handling. Support for it in the old jit will be

  removed in the 3.4 release.

   Special New Feature

   -------------------

* Command line options can now be grouped into categories which are shown in

  the output of ``-help``. See :ref:`grouping options into categories`.

   Makes programs 10x faster by doing Special New Thing.

* The appearance of command line options in ``-help`` that are inherited by

  linking with libraries that use the LLVM Command line support library can now

  be modified at runtime. See :ref:`cl::getRegisteredOptions`.

AArch64 target

--------------

Hexagon Target

--------------

- Removed support for legacy hexagonv2 and hexagonv3 processor

  architectures which are no longer in use. Currently supported

  architectures are hexagonv4 and hexagonv5.

Removed support for legacy hexagonv2 and hexagonv3 processor architectures which

are no longer in use. Currently supported architectures arehexagonv4 and

hexagonv5.

Loop Vectorizer

---------------

--------------

LLVM now has a new SLP vectorizer. The new SLP vectorizer is not enabled by

default but can be enabled using the clang flag -fslp-vectorize. The BB-vectorizer

can also be enabled using the command line flag -fslp-vectorize-aggressive.

default but can be enabled using the clang flag ``-fslp-vectorize``. The

BB-vectorizer can also be enabled using the command line flag

``-fslp-vectorize-aggressive``.

R600 Backend

------------

The R600 backend was added in this release, it supports AMD GPUs

(HD2XXX - HD7XXX).  This backend is used in AMD's Open Source

graphics / compute drivers which are developed as part of the `Mesa3D

<http://www.mesa3d.org>`_ project.

The R600 backend was added in this release, it supports AMD GPUs (HD2XXX -

HD7XXX).  This backend is used in AMD's Open Source graphics / compute drivers

which are developed as part of the `Mesa3D <http://www.mesa3d.org>`_ project.

SystemZ/s390x Backend

---------------------

z10 or greater.

Sub-project Status Update

=========================

In addition to the core LLVM 3.3 distribution of production-quality compiler

infrastructure, the LLVM project includes sub-projects that use the LLVM core

and share the same distribution license.  This section provides updates on these

sub-projects.

LLDB: Low Level Debugger

------------------------

`LLDB <http://lldb.llvm.org/>`_ is a ground-up implementation of a command-line

debugger, as well as a debugger API that can be used from scripts and other

applications. LLDB uses the following components of the LLVM core distribution

to support the latest language features and target support:

- the Clang parser for high-quality parsing of C, C++ and Objective C

- the LLVM disassembler

- the LLVM JIT compiler (MCJIT) for expression evaluation

The `3.3 release <http://llvm.org/apt/>`_ has the following notable changes.

Linux Features:

- Support for watchpoints

- vim integration for lldb commands and program status using a `vim plug-in

  <http://llvm.org/svn/llvm-project/lldb/trunk/utils/vim-lldb/README>`_

- Improved register support including vector registers

- Builds with cmake/ninja/auto-tools/clang 3.3/gcc 4.6

Linux Improvements:

- Debugging multi-threaded programs

- Debugging i386 programs

- Process list, attach and fork

- Expression evaluation

External Open Source Projects Using LLVM 3.3

============================================

An exciting aspect of LLVM is that it is used as an enabling technology for

a lot of other language and tools projects. This section lists some of the

An exciting aspect of LLVM is that it is used as an enabling technology for a

lot of other language and tools projects. This section lists some of the

projects that have already been updated to work with LLVM 3.3.

Portable Computing Language (pocl)

----------------------------------

In addition to producing an easily portable open source OpenCL

implementation, another major goal of `pocl <http://pocl.sourceforge.net/>`_ 

is improving performance portability of OpenCL programs with

compiler optimizations, reducing the need for target-dependent manual

optimizations. An important part of pocl is a set of LLVM passes used to

statically parallelize multiple work-items with the kernel compiler, even in

the presence of work-group barriers. This enables static parallelization of

the fine-grained static concurrency in the work groups in multiple ways.

In addition to producing an easily portable open source OpenCL implementation,

another major goal of `pocl <http://pocl.sourceforge.net/>`_ is improving

performance portability of OpenCL programs with compiler optimizations, reducing

the need for target-dependent manual optimizations. An important part of pocl is

a set of LLVM passes used to statically parallelize multiple work-items with the

kernel compiler, even in the presence of work-group barriers. This enables

static parallelization of the fine-grained static concurrency in the work groups

in multiple ways.

TTA-based Co-design Environment (TCE)

-------------------------------------

`TCE <http://tce.cs.tut.fi/>`_ is a toolset for designing new 

processors based on the Transport triggered architecture (TTA). 

The toolset provides a complete co-design flow from C/C++

programs down to synthesizable VHDL/Verilog and parallel program binaries.

Processor customization points include the register files, function units,

supported operations, and the interconnection network.

`TCE <http://tce.cs.tut.fi/>`_ is a toolset for designing new processors based

on the Transport triggered architecture (TTA).  The toolset provides a complete

co-design flow from C/C++ programs down to synthesizable VHDL/Verilog and

parallel program binaries.  Processor customization points include the register

files, function units, supported operations, and the interconnection network.

TCE uses Clang and LLVM for C/C++/OpenCL C language support, target independent

optimizations and also for parts of code generation. It generates new

LLVM-based code generators "on the fly" for the designed TTA processors and

loads them in to the compiler backend as runtime libraries to avoid

per-target recompilation of larger parts of the compiler chain.

optimizations and also for parts of code generation. It generates new LLVM-based

code generators "on the fly" for the designed TTA processors and loads them in

to the compiler backend as runtime libraries to avoid per-target recompilation

of larger parts of the compiler chain.

Just-in-time Adaptive Decoder Engine (Jade)

-------------------------------------------

`Jade <https://github.com/orcc/jade>`_ (Just-in-time Adaptive Decoder Engine) is

a generic video decoder engine using LLVM for just-in-time compilation of video

decoder configurations. Those configurations are designed by MPEG Reconfigurable

Video Coding (RVC) committee. MPEG RVC standard is built on a stream-based

dataflow representation of decoders. It is composed of a standard library of

coding tools written in RVC-CAL language and a dataflow configuration --- block

diagram --- of a decoder.

Jade project is hosted as part of the Open RVC-CAL Compiler (`Orcc

<http://orcc.sf.net>`_) and requires it to translate the RVC-CAL standard

library of video coding tools into an LLVM assembly code.

LDC - the LLVM-based D compiler

-------------------------------

`D <http://dlang.org>`_ is a language with C-like syntax and static typing. It

pragmatically combines efficiency, control, and modeling power, with safety and

programmer productivity. D supports powerful concepts like Compile-Time Function

Execution (CTFE) and Template Meta-Programming, provides an innovative approach

to concurrency and offers many classical paradigms.

`LDC <http://wiki.dlang.org/LDC>`_ uses the frontend from the reference compiler

combined with LLVM as backend to produce efficient native code. LDC targets

x86/x86_64 systems like Linux, OS X and Windows and also Linux/PPC64. Ports to

other architectures like ARM are underway.

Additional Information