Commit 368a2bed authored by Bill Wendling's avatar Bill Wendling
Browse files

Merging r216064: 

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r216064 | kongyi | 2014-08-20 03:40:20 -0700 (Wed, 20 Aug 2014) | 9 lines

ARM: Fix codegen for rbit intrinsic

LLVM generates illegal `rbit r0, #352` instruction for rbit intrinsic.
According to ARM ARM, rbit only takes register as argument, not immediate.
The correct instruction should be rbit <Rd>, <Rm>.

The bug was originally introduced in r211057.

Differential Revision: http://reviews.llvm.org/D4980
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llvm-svn: 216089
parent 95959916

llvm/lib/Target/ARM/ARMISelLowering.cpp

+2 −2
Original line number Diff line number Diff line
@@ -2578,9 +2578,9 @@ ARMTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG, 
  switch (IntNo) {

  default: return SDValue();    // Don't custom lower most intrinsics.

  case Intrinsic::arm_rbit: {

    assert(Op.getOperand(0).getValueType() == MVT::i32 &&

    assert(Op.getOperand(1).getValueType() == MVT::i32 &&

           "RBIT intrinsic must have i32 type!");

    return DAG.getNode(ARMISD::RBIT, dl, MVT::i32, Op.getOperand(0));

    return DAG.getNode(ARMISD::RBIT, dl, MVT::i32, Op.getOperand(1));

  }

  case Intrinsic::arm_thread_pointer: {

    EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();

llvm/test/CodeGen/AArch64/rbit.ll

0 → 100644
+20 −0
Original line number Diff line number Diff line 
; RUN: llc -mtriple=aarch64-eabi %s -o - | FileCheck %s



; CHECK-LABEL: rbit32

; CHECK: rbit w0, w0

define i32 @rbit32(i32 %t) {

entry:

  %rbit.i = call i32 @llvm.aarch64.rbit.i32(i32 %t)

  ret i32 %rbit.i

}



; CHECK-LABEL: rbit64

; CHECK: rbit x0, x0

define i64 @rbit64(i64 %t) {

entry:

  %rbit.i = call i64 @llvm.aarch64.rbit.i64(i64 %t)

  ret i64 %rbit.i

}



declare i64 @llvm.aarch64.rbit.i64(i64)

declare i32 @llvm.aarch64.rbit.i32(i32)

llvm/test/CodeGen/ARM/rbit.ll

0 → 100644
+20 −0
Original line number Diff line number Diff line 
; RUN: llc -mtriple=armv8-eabi %s -o - | FileCheck %s



; CHECK-LABEL: rbit

; CHECK: rbit r0, r0

define i32 @rbit(i32 %t) {

entry:

  %rbit = call i32 @llvm.arm.rbit(i32 %t)

  ret i32 %rbit

}



; CHECK-LABEL: rbit_constant

; CHECK: mov r0, #0

; CHECK: rbit r0, r0

define i32 @rbit_constant() {

entry:

  %rbit.i = call i32 @llvm.arm.rbit(i32 0)

  ret i32 %rbit.i

}



declare i32 @llvm.arm.rbit(i32)