Commit 3300c5ae authored by Tom Stellard's avatar Tom Stellard
Browse files

Merging r332682 and r332694: 

------------------------------------------------------------------------
r332682 | kfischer | 2018-05-17 18:03:01 -0700 (Thu, 17 May 2018) | 21 lines

[X86DomainReassignment] Don't compare stack-allocated values by address

Summary:
The Closure allocated in the main loop is allocated on the stack. However,
later in the code its address is taken (and used for comparisons). This
obviously doesn't work. In fact, the Closure will get the same stack address
during every loop iteration, rendering the check that intended to identify
Closure conflicts entirely ineffective. Fix this bug by giving every Closure
a unique ID and using that for comparison. Alternatively, we could heap
allocate the closure object.

Fixes PR37396
Fixes JuliaLang/julia#27032

Reviewers: craig.topper, guyblank

Reviewed By: craig.topper

Subscribers: vchuravy, llvm-commits

Differential Revision: https://reviews.llvm.org/D46800
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r332694 | kfischer | 2018-05-17 21:36:38 -0700 (Thu, 17 May 2018) | 15 lines

[X86DomainReassignment] Hopefully fix buildbot failure

The Darwin build bot failed with:
```
llc -mcpu=skylake-avx512 -mtriple=x86_64-unknown-linux-gnu domain-reassignment-test.ll -o - | llvm-mc
--
Exit Code: 134

Command Output (stderr):
--
Assertion failed: (MAI->hasSingleParameterDotFile()), function EmitFileDirective, file lib/MC/MCAsmStreamer.cpp, line 1087.
```

Looks like this is because the `llvm-mc` command was missing a triple
directive and defaulting to MachO. Add the triple option.
------------------------------------------------------------------------

llvm-svn: 333470
parent 2875d5f8

llvm/lib/Target/X86/X86DomainReassignment.cpp

+35 −6
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ 
#include "llvm/CodeGen/MachineRegisterInfo.h"

#include "llvm/CodeGen/TargetRegisterInfo.h"

#include "llvm/Support/Debug.h"

#include "llvm/Support/Printable.h"

#include <bitset>



using namespace llvm;
@@ -291,8 +292,12 @@ private: 
  /// Domains which this closure can legally be reassigned to.

  std::bitset<NumDomains> LegalDstDomains;



  /// An ID to uniquely identify this closure, even when it gets

  /// moved around

  unsigned ID;



public:

  Closure(std::initializer_list<RegDomain> LegalDstDomainList) {

  Closure(unsigned ID, std::initializer_list<RegDomain> LegalDstDomainList) : ID(ID) {

    for (RegDomain D : LegalDstDomainList)

      LegalDstDomains.set(D);

  }
@@ -328,6 +333,27 @@ public: 
    return Instrs;

  }



  LLVM_DUMP_METHOD void dump(const MachineRegisterInfo *MRI) const {

    dbgs() << "Registers: ";

    bool First = true;

    for (unsigned Reg : Edges) {

      if (!First)

        dbgs() << ", ";

      First = false;

      dbgs() << printReg(Reg, MRI->getTargetRegisterInfo());

    }

    dbgs() << "\n" << "Instructions:";

    for (MachineInstr *MI : Instrs) {

      dbgs() << "\n  ";

      MI->print(dbgs());

    }

    dbgs() << "\n";

  }



  unsigned getID() const {

    return ID;

  }



};



class X86DomainReassignment : public MachineFunctionPass {
@@ -339,7 +365,7 @@ class X86DomainReassignment : public MachineFunctionPass { 
  DenseSet<unsigned> EnclosedEdges;



  /// All instructions that are included in some closure.

  DenseMap<MachineInstr *, Closure *> EnclosedInstrs;

  DenseMap<MachineInstr *, unsigned> EnclosedInstrs;



public:

  static char ID;
@@ -416,14 +442,14 @@ void X86DomainReassignment::visitRegister(Closure &C, unsigned Reg, 
void X86DomainReassignment::encloseInstr(Closure &C, MachineInstr *MI) {

  auto I = EnclosedInstrs.find(MI);

  if (I != EnclosedInstrs.end()) {

    if (I->second != &C)

    if (I->second != C.getID())

      // Instruction already belongs to another closure, avoid conflicts between

      // closure and mark this closure as illegal.

      C.setAllIllegal();

    return;

  }



  EnclosedInstrs[MI] = &C;

  EnclosedInstrs[MI] = C.getID();

  C.addInstruction(MI);



  // Mark closure as illegal for reassignment to domains, if there is no
@@ -704,6 +730,7 @@ bool X86DomainReassignment::runOnMachineFunction(MachineFunction &MF) { 
  std::vector<Closure> Closures;



  // Go over all virtual registers and calculate a closure.

  unsigned ClosureID = 0;

  for (unsigned Idx = 0; Idx < MRI->getNumVirtRegs(); ++Idx) {

    unsigned Reg = TargetRegisterInfo::index2VirtReg(Idx);
@@ -716,7 +743,7 @@ bool X86DomainReassignment::runOnMachineFunction(MachineFunction &MF) { 
      continue;



    // Calculate closure starting with Reg.

    Closure C({MaskDomain});

    Closure C(ClosureID++, {MaskDomain});

    buildClosure(C, Reg);



    // Collect all closures that can potentially be converted.
@@ -724,12 +751,14 @@ bool X86DomainReassignment::runOnMachineFunction(MachineFunction &MF) { 
      Closures.push_back(std::move(C));

  }



  for (Closure &C : Closures)

  for (Closure &C : Closures) {

    DEBUG(C.dump(MRI));

    if (isReassignmentProfitable(C, MaskDomain)) {

      reassign(C, MaskDomain);

      ++NumClosuresConverted;

      Changed = true;

    }

  }



  DeleteContainerSeconds(Converters);

llvm/test/CodeGen/X86/domain-reassignment-test.ll

0 → 100644
+37 −0
Original line number Diff line number Diff line 
; RUN: llc -mcpu=skylake-avx512 -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s

; RUN: llc -mcpu=skylake-avx512 -mtriple=x86_64-unknown-linux-gnu %s -o - | llvm-mc -triple=x86_64-unknown-linux-gnu -mcpu=skylake-avx512



; Check that the X86 domain reassignment pass doesn't introduce an illegal

; test instruction. See PR37396

define void @japi1_foo2_34617() {

pass2:

  br label %if5



L174:

  %tmp = icmp sgt <2 x i64> undef, zeroinitializer

  %tmp1 = icmp sle <2 x i64> undef, undef

  %tmp2 = and <2 x i1> %tmp, %tmp1

  %tmp3 = extractelement <2 x i1> %tmp2, i32 0

  %tmp4 = extractelement <2 x i1> %tmp2, i32 1

  %tmp106 = and i1 %tmp4, %tmp3

  %tmp107 = zext i1 %tmp106 to i8

  %tmp108 = and i8 %tmp122, %tmp107

  %tmp109 = icmp eq i8 %tmp108, 0

; CHECK-NOT: testb  {{%k[0-7]}}

  br i1 %tmp109, label %L188, label %L190



if5:

  %b.055 = phi i8 [ 1, %pass2 ], [ %tmp122, %if5 ]

  %tmp118 = icmp sgt i64 undef, 0

  %tmp119 = icmp sle i64 undef, undef

  %tmp120 = and i1 %tmp118, %tmp119

  %tmp121 = zext i1 %tmp120 to i8

  %tmp122 = and i8 %b.055, %tmp121

  br i1 undef, label %L174, label %if5



L188:

  unreachable



L190:

  ret void

}