Commit 2fd90848 authored by Tom Stellard's avatar Tom Stellard
Browse files

Merging r260645: 

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r260645 | Matthew.Arsenault | 2016-02-11 18:16:10 -0800 (Thu, 11 Feb 2016) | 2 lines

AMDGPU: Initialize SILowerControlFlow

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llvm-svn: 271643
parent 71b63bed

llvm/lib/Target/AMDGPU/AMDGPU.h

+5 −1
Original line number Diff line number Diff line
@@ -44,7 +44,7 @@ FunctionPass *createSIFoldOperandsPass(); 
FunctionPass *createSILowerI1CopiesPass();

FunctionPass *createSIShrinkInstructionsPass();

FunctionPass *createSILoadStoreOptimizerPass(TargetMachine &tm);

FunctionPass *createSILowerControlFlowPass(TargetMachine &tm);

FunctionPass *createSILowerControlFlowPass();

FunctionPass *createSIFixControlFlowLiveIntervalsPass();

FunctionPass *createSIFixSGPRCopiesPass();

FunctionPass *createSIFixSGPRLiveRangesPass();
@@ -69,6 +69,10 @@ extern char &SILowerI1CopiesID; 
void initializeSILoadStoreOptimizerPass(PassRegistry &);

extern char &SILoadStoreOptimizerID;



void initializeSILowerControlFlowPass(PassRegistry &);

extern char &SILowerControlFlowPassID;





// Passes common to R600 and SI

FunctionPass *createAMDGPUPromoteAlloca(const TargetMachine *TM = nullptr);

void initializeAMDGPUPromoteAllocaPass(PassRegistry&);

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

+2 −1
Original line number Diff line number Diff line
@@ -55,6 +55,7 @@ extern "C" void LLVMInitializeAMDGPUTarget() { 
  initializeAMDGPUPromoteAllocaPass(*PR);

  initializeSIAnnotateControlFlowPass(*PR);

  initializeSIInsertWaitsPass(*PR);

  initializeSILowerControlFlowPass(*PR);

}



static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) {
@@ -361,7 +362,7 @@ void GCNPassConfig::addPreSched2() { 


void GCNPassConfig::addPreEmitPass() {

  addPass(createSIInsertWaitsPass(), false);

  addPass(createSILowerControlFlowPass(*TM), false);

  addPass(createSILowerControlFlowPass(), false);

}



TargetPassConfig *GCNTargetMachine::createPassConfig(PassManagerBase &PM) {

llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp

+36 −28
Original line number Diff line number Diff line
@@ -61,14 +61,14 @@ 


using namespace llvm;



namespace {

#define DEBUG_TYPE "si-lower-control-flow"



class SILowerControlFlowPass : public MachineFunctionPass {

namespace {



class SILowerControlFlow : public MachineFunctionPass {

private:

  static const unsigned SkipThreshold = 12;



  static char ID;

  const SIRegisterInfo *TRI;

  const SIInstrInfo *TII;
@@ -94,13 +94,15 @@ private: 
  void IndirectDst(MachineInstr &MI);



public:

  SILowerControlFlowPass(TargetMachine &tm) :

  static char ID;



  SILowerControlFlow() :

    MachineFunctionPass(ID), TRI(nullptr), TII(nullptr) { }



  bool runOnMachineFunction(MachineFunction &MF) override;



  const char *getPassName() const override {

    return "SI Lower control flow instructions";

    return "SI Lower control flow pseudo instructions";

  }



  void getAnalysisUsage(AnalysisUsage &AU) const override {
@@ -111,13 +113,19 @@ public: 


} // End anonymous namespace



char SILowerControlFlowPass::ID = 0;

char SILowerControlFlow::ID = 0;



INITIALIZE_PASS(SILowerControlFlow, DEBUG_TYPE,

                "SI lower control flow", false, false)



char &llvm::SILowerControlFlowPassID = SILowerControlFlow::ID;





FunctionPass *llvm::createSILowerControlFlowPass(TargetMachine &tm) {

  return new SILowerControlFlowPass(tm);

FunctionPass *llvm::createSILowerControlFlowPass() {

  return new SILowerControlFlow();

}



bool SILowerControlFlowPass::shouldSkip(MachineBasicBlock *From,

bool SILowerControlFlow::shouldSkip(MachineBasicBlock *From,

                                    MachineBasicBlock *To) {



  unsigned NumInstr = 0;
@@ -137,7 +145,7 @@ bool SILowerControlFlowPass::shouldSkip(MachineBasicBlock *From, 
  return false;

}



void SILowerControlFlowPass::Skip(MachineInstr &From, MachineOperand &To) {

void SILowerControlFlow::Skip(MachineInstr &From, MachineOperand &To) {



  if (!shouldSkip(*From.getParent()->succ_begin(), To.getMBB()))

    return;
@@ -147,7 +155,7 @@ void SILowerControlFlowPass::Skip(MachineInstr &From, MachineOperand &To) { 
    .addOperand(To);

}



void SILowerControlFlowPass::SkipIfDead(MachineInstr &MI) {

void SILowerControlFlow::SkipIfDead(MachineInstr &MI) {



  MachineBasicBlock &MBB = *MI.getParent();

  DebugLoc DL = MI.getDebugLoc();
@@ -180,7 +188,7 @@ void SILowerControlFlowPass::SkipIfDead(MachineInstr &MI) { 
  BuildMI(MBB, Insert, DL, TII->get(AMDGPU::S_ENDPGM));

}



void SILowerControlFlowPass::If(MachineInstr &MI) {

void SILowerControlFlow::If(MachineInstr &MI) {

  MachineBasicBlock &MBB = *MI.getParent();

  DebugLoc DL = MI.getDebugLoc();

  unsigned Reg = MI.getOperand(0).getReg();
@@ -198,7 +206,7 @@ void SILowerControlFlowPass::If(MachineInstr &MI) { 
  MI.eraseFromParent();

}



void SILowerControlFlowPass::Else(MachineInstr &MI) {

void SILowerControlFlow::Else(MachineInstr &MI) {

  MachineBasicBlock &MBB = *MI.getParent();

  DebugLoc DL = MI.getDebugLoc();

  unsigned Dst = MI.getOperand(0).getReg();
@@ -217,7 +225,7 @@ void SILowerControlFlowPass::Else(MachineInstr &MI) { 
  MI.eraseFromParent();

}



void SILowerControlFlowPass::Break(MachineInstr &MI) {

void SILowerControlFlow::Break(MachineInstr &MI) {

  MachineBasicBlock &MBB = *MI.getParent();

  DebugLoc DL = MI.getDebugLoc();
@@ -231,7 +239,7 @@ void SILowerControlFlowPass::Break(MachineInstr &MI) { 
  MI.eraseFromParent();

}



void SILowerControlFlowPass::IfBreak(MachineInstr &MI) {

void SILowerControlFlow::IfBreak(MachineInstr &MI) {

  MachineBasicBlock &MBB = *MI.getParent();

  DebugLoc DL = MI.getDebugLoc();
@@ -246,7 +254,7 @@ void SILowerControlFlowPass::IfBreak(MachineInstr &MI) { 
  MI.eraseFromParent();

}



void SILowerControlFlowPass::ElseBreak(MachineInstr &MI) {

void SILowerControlFlow::ElseBreak(MachineInstr &MI) {

  MachineBasicBlock &MBB = *MI.getParent();

  DebugLoc DL = MI.getDebugLoc();
@@ -261,7 +269,7 @@ void SILowerControlFlowPass::ElseBreak(MachineInstr &MI) { 
  MI.eraseFromParent();

}



void SILowerControlFlowPass::Loop(MachineInstr &MI) {

void SILowerControlFlow::Loop(MachineInstr &MI) {

  MachineBasicBlock &MBB = *MI.getParent();

  DebugLoc DL = MI.getDebugLoc();

  unsigned Src = MI.getOperand(0).getReg();
@@ -276,7 +284,7 @@ void SILowerControlFlowPass::Loop(MachineInstr &MI) { 
  MI.eraseFromParent();

}



void SILowerControlFlowPass::EndCf(MachineInstr &MI) {

void SILowerControlFlow::EndCf(MachineInstr &MI) {

  MachineBasicBlock &MBB = *MI.getParent();

  DebugLoc DL = MI.getDebugLoc();

  unsigned Reg = MI.getOperand(0).getReg();
@@ -289,14 +297,14 @@ void SILowerControlFlowPass::EndCf(MachineInstr &MI) { 
  MI.eraseFromParent();

}



void SILowerControlFlowPass::Branch(MachineInstr &MI) {

void SILowerControlFlow::Branch(MachineInstr &MI) {

  if (MI.getOperand(0).getMBB() == MI.getParent()->getNextNode())

    MI.eraseFromParent();



  // If these aren't equal, this is probably an infinite loop.

}



void SILowerControlFlowPass::Kill(MachineInstr &MI) {

void SILowerControlFlow::Kill(MachineInstr &MI) {

  MachineBasicBlock &MBB = *MI.getParent();

  DebugLoc DL = MI.getDebugLoc();

  const MachineOperand &Op = MI.getOperand(0);
@@ -325,7 +333,7 @@ void SILowerControlFlowPass::Kill(MachineInstr &MI) { 
  MI.eraseFromParent();

}



void SILowerControlFlowPass::LoadM0(MachineInstr &MI, MachineInstr *MovRel, int Offset) {

void SILowerControlFlow::LoadM0(MachineInstr &MI, MachineInstr *MovRel, int Offset) {



  MachineBasicBlock &MBB = *MI.getParent();

  DebugLoc DL = MI.getDebugLoc();
@@ -403,7 +411,7 @@ void SILowerControlFlowPass::LoadM0(MachineInstr &MI, MachineInstr *MovRel, int 
//                         indirect Index. e.g. v0 = v[VecReg + Offset]

//                         As an output, this is a constant value that needs

//                         to be added to the value stored in M0.

void SILowerControlFlowPass::computeIndirectRegAndOffset(unsigned VecReg,

void SILowerControlFlow::computeIndirectRegAndOffset(unsigned VecReg,

                                                     unsigned &Reg,

                                                     int &Offset) {

  unsigned SubReg = TRI->getSubReg(VecReg, AMDGPU::sub0);
@@ -423,7 +431,7 @@ void SILowerControlFlowPass::computeIndirectRegAndOffset(unsigned VecReg, 
  Reg = RC->getRegister(RegIdx);

}



void SILowerControlFlowPass::IndirectSrc(MachineInstr &MI) {

void SILowerControlFlow::IndirectSrc(MachineInstr &MI) {



  MachineBasicBlock &MBB = *MI.getParent();

  DebugLoc DL = MI.getDebugLoc();
@@ -443,7 +451,7 @@ void SILowerControlFlowPass::IndirectSrc(MachineInstr &MI) { 
  LoadM0(MI, MovRel, Off);

}



void SILowerControlFlowPass::IndirectDst(MachineInstr &MI) {

void SILowerControlFlow::IndirectDst(MachineInstr &MI) {



  MachineBasicBlock &MBB = *MI.getParent();

  DebugLoc DL = MI.getDebugLoc();
@@ -464,7 +472,7 @@ void SILowerControlFlowPass::IndirectDst(MachineInstr &MI) { 
  LoadM0(MI, MovRel, Off);

}



bool SILowerControlFlowPass::runOnMachineFunction(MachineFunction &MF) {

bool SILowerControlFlow::runOnMachineFunction(MachineFunction &MF) {

  TII = static_cast<const SIInstrInfo *>(MF.getSubtarget().getInstrInfo());

  TRI =

      static_cast<const SIRegisterInfo *>(MF.getSubtarget().getRegisterInfo());