Commit 2b7025e0 authored by Tanya Lattner's avatar Tanya Lattner
Browse files

Fix PR5001 PR5002. 

llvm-svn: 82191
parent 49a9f7ff

llvm/test/CodeGen/X86/cmov-zext.ll

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; RUN: llc < %s -march=x86-64 | FileCheck %s

; RUN: llvm-as < %s | llc -march=x86-64 | FileCheck %s



; x86's 32-bit cmov doesn't clobber the high 32 bits of the destination

; if the condition is false. An explicit zero-extend (movl) is needed

llvm/test/CodeGen/X86/combiner-aa-1.ll

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; RUN: llc < %s --combiner-alias-analysis --combiner-global-alias-analysis

; RUN: llvm-as < %s | llc --combiner-alias-analysis --combiner-global-alias-analysis

; PR4880



target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"

llvm/test/Transforms/MemCpyOpt/align.ll

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Original line number Diff line number Diff line 
; RUN: opt < %s -S -memcpyopt | FileCheck %s

; RUN: llvm-as < %s | opt -memcpyopt | llvm-dis | FileCheck %s



; The resulting memset is only 4-byte aligned, despite containing

; a 16-byte alignmed store in the middle.