Commit 1c2fc128 authored by Hans Wennborg's avatar Hans Wennborg
Browse files

Merging r325687: 

------------------------------------------------------------------------
r325687 | sbaranga | 2018-02-21 16:20:32 +0100 (Wed, 21 Feb 2018) | 8 lines

[SCEV] Temporarily disable loop versioning for the purpose
of turning SCEVUnknowns of PHIs into AddRecExprs.

This feature is now hidden behind the -scev-version-unknown flag.

Fixes PR36032 and PR35432.


------------------------------------------------------------------------

llvm-svn: 325773
parent bbda6e32

llvm/lib/Analysis/ScalarEvolution.cpp

+7 −0
Original line number Diff line number Diff line
@@ -205,6 +205,11 @@ static cl::opt<unsigned> 
                  cl::desc("Max coefficients in AddRec during evolving"),

                  cl::init(16));



static cl::opt<bool> VersionUnknown(

    "scev-version-unknown", cl::Hidden,

    cl::desc("Use predicated scalar evolution to version SCEVUnknowns"),

    cl::init(false));



//===----------------------------------------------------------------------===//

//                           SCEV class definitions

//===----------------------------------------------------------------------===//
@@ -11467,6 +11472,8 @@ private: 
  // couldn't create an AddRec for it, or couldn't add the predicate), we just

  // return \p Expr.

  const SCEV *convertToAddRecWithPreds(const SCEVUnknown *Expr) {

    if (!VersionUnknown)

      return Expr;

    if (!isa<PHINode>(Expr->getValue()))

      return Expr;

    Optional<std::pair<const SCEV *, SmallVector<const SCEVPredicate *, 3>>>

llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll

+1 −1
Original line number Diff line number Diff line 
; RUN: opt -S -loop-vectorize -force-vector-width=4 -force-vector-interleave=1 < %s 2>&1 | FileCheck %s

; RUN: opt -S -loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -scev-version-unknown < %s 2>&1 | FileCheck %s



target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

llvm/test/Transforms/LoopVectorize/pr35773.ll

+1 −1
Original line number Diff line number Diff line 
; RUN: opt -S -loop-vectorize -force-vector-width=4 -force-vector-interleave=1 < %s 2>&1 | FileCheck %s

; RUN: opt -S -loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -scev-version-unknown < %s 2>&1 | FileCheck %s

target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

@a = common local_unnamed_addr global i32 0, align 4

@b = common local_unnamed_addr global i8 0, align 1

llvm/test/Transforms/LoopVectorize/vect-phiscev-sext-trunc.ll

+2 −2
Original line number Diff line number Diff line 
; RUN: opt -S -loop-vectorize -force-vector-width=8 -force-vector-interleave=1 < %s | FileCheck %s -check-prefix=VF8

; RUN: opt -S -loop-vectorize -force-vector-width=1 -force-vector-interleave=4 < %s | FileCheck %s -check-prefix=VF1

; RUN: opt -S -loop-vectorize -force-vector-width=8 -force-vector-interleave=1 -scev-version-unknown < %s | FileCheck %s -check-prefix=VF8

; RUN: opt -S -loop-vectorize -force-vector-width=1 -force-vector-interleave=4 -scev-version-unknown < %s | FileCheck %s -check-prefix=VF1



target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"