Loading mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td +13 −0 Original line number Diff line number Diff line Loading @@ -536,6 +536,19 @@ def ROCDL_BarrierOp : ROCDL_Op<"barrier"> { let assemblyFormat = "attr-dict"; } def ROCDL_WaveBarrierOp : ROCDL_ConcreteNonMemIntrOp<"wave.barrier", [], 0> { let assemblyFormat = "attr-dict"; let description = [{ Insert a wave-level (subgroup) barrier. Synchronizes lanes within a single wave/wavefront without any memory ordering guarantees. Example: ```mlir rocdl.wave.barrier ``` }]; } def ROCDLGlobalBuffer : LLVM_PointerInAddressSpace<1>; def ROCDLBufferLDS : LLVM_PointerInAddressSpace<3>; Loading mlir/test/Dialect/LLVMIR/rocdl.mlir +6 −0 Original line number Diff line number Diff line Loading @@ -111,6 +111,12 @@ func.func @rocdl.barrier() { llvm.return } func.func @rocdl.wave_barrier() { // CHECK: rocdl.wave.barrier rocdl.wave.barrier llvm.return } func.func @rocdl.sched_barrier() { // CHECK: rocdl.sched.barrier rocdl.sched.barrier 0 Loading mlir/test/Target/LLVMIR/rocdl.mlir +7 −0 Original line number Diff line number Diff line Loading @@ -262,6 +262,13 @@ llvm.func @rocdl.barrier() { llvm.return } llvm.func @rocdl.wave_barrier() { // CHECK-LABEL: rocdl.wave_barrier // CHECK-NEXT: call void @llvm.amdgcn.wave.barrier() rocdl.wave.barrier llvm.return } llvm.func @rocdl.s.barrier.init(%ptr : !llvm.ptr<3>) { // CHECK-LABEL: rocdl.s.barrier.init // CHECK: call void @llvm.amdgcn.s.barrier.init(ptr addrspace(3) %{{.*}}, i32 1) Loading Loading
mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td +13 −0 Original line number Diff line number Diff line Loading @@ -536,6 +536,19 @@ def ROCDL_BarrierOp : ROCDL_Op<"barrier"> { let assemblyFormat = "attr-dict"; } def ROCDL_WaveBarrierOp : ROCDL_ConcreteNonMemIntrOp<"wave.barrier", [], 0> { let assemblyFormat = "attr-dict"; let description = [{ Insert a wave-level (subgroup) barrier. Synchronizes lanes within a single wave/wavefront without any memory ordering guarantees. Example: ```mlir rocdl.wave.barrier ``` }]; } def ROCDLGlobalBuffer : LLVM_PointerInAddressSpace<1>; def ROCDLBufferLDS : LLVM_PointerInAddressSpace<3>; Loading
mlir/test/Dialect/LLVMIR/rocdl.mlir +6 −0 Original line number Diff line number Diff line Loading @@ -111,6 +111,12 @@ func.func @rocdl.barrier() { llvm.return } func.func @rocdl.wave_barrier() { // CHECK: rocdl.wave.barrier rocdl.wave.barrier llvm.return } func.func @rocdl.sched_barrier() { // CHECK: rocdl.sched.barrier rocdl.sched.barrier 0 Loading
mlir/test/Target/LLVMIR/rocdl.mlir +7 −0 Original line number Diff line number Diff line Loading @@ -262,6 +262,13 @@ llvm.func @rocdl.barrier() { llvm.return } llvm.func @rocdl.wave_barrier() { // CHECK-LABEL: rocdl.wave_barrier // CHECK-NEXT: call void @llvm.amdgcn.wave.barrier() rocdl.wave.barrier llvm.return } llvm.func @rocdl.s.barrier.init(%ptr : !llvm.ptr<3>) { // CHECK-LABEL: rocdl.s.barrier.init // CHECK: call void @llvm.amdgcn.s.barrier.init(ptr addrspace(3) %{{.*}}, i32 1) Loading