Commit 120ca53c authored by Daniel Sanders's avatar Daniel Sanders
Browse files

Merging r275967: 

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r275967 | dsanders | 2016-07-19 11:49:03 +0100 (Tue, 19 Jul 2016) | 16 lines

[mips] Correct label prefixes for N32 and N64.

Summary:
N32 and N64 follow the standard ELF conventions (.L) whereas O32 uses its own
($).

This fixes the majority of object differences between -fintegrated-as and
-fno-integrated-as.

Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: https://reviews.llvm.org/D22412


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llvm-svn: 276561
parent 53da0ecd

llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp

+9 −2
Original line number Diff line number Diff line
@@ -28,12 +28,19 @@ MipsMCAsmInfo::MipsMCAsmInfo(const Triple &TheTriple) { 
    PointerSize = CalleeSaveStackSlotSize = 8;

  }



  // FIXME: This condition isn't quite right but it's the best we can do until

  //        this object can identify the ABI. It will misbehave when using O32

  //        on a mips64*-* triple.

  if ((TheTriple.getArch() == Triple::mipsel) ||

      (TheTriple.getArch() == Triple::mips)) {

    PrivateGlobalPrefix = "$";

    PrivateLabelPrefix = "$";

  }



  AlignmentIsInBytes          = false;

  Data16bitsDirective         = "\t.2byte\t";

  Data32bitsDirective         = "\t.4byte\t";

  Data64bitsDirective         = "\t.8byte\t";

  PrivateGlobalPrefix         = "$";

  PrivateLabelPrefix          = "$";

  CommentString               = "#";

  ZeroDirective               = "\t.space\t";

  GPRel32Directive            = "\t.gpword\t";

llvm/lib/Target/Mips/MipsTargetMachine.cpp

+4 −1
Original line number Diff line number Diff line
@@ -57,7 +57,10 @@ static std::string computeDataLayout(const Triple &TT, StringRef CPU, 
  else

    Ret += "E";



  if (ABI.IsO32())

    Ret += "-m:m";

  else

    Ret += "-m:e";



  // Pointers are 32 bit on some ABIs.

  if (!ABI.IsN64())

llvm/test/CodeGen/Mips/2009-11-16-CstPoolLoad.ll

+8 −8
Original line number Diff line number Diff line
@@ -11,13 +11,13 @@ entry: 
; PIC-O32: lwc1 $f0, %lo($CPI0_0)($[[R0]])

; STATIC-O32: lui  $[[R0:[0-9]+]], %hi($CPI0_0)

; STATIC-O32: lwc1 $f0, %lo($CPI0_0)($[[R0]])

; PIC-N32: lw  $[[R0:[0-9]+]], %got_page($CPI0_0)

; PIC-N32: lwc1 $f0, %got_ofst($CPI0_0)($[[R0]])

; STATIC-N32: lui  $[[R0:[0-9]+]], %hi($CPI0_0)

; STATIC-N32: lwc1 $f0, %lo($CPI0_0)($[[R0]])

; PIC-N64: ld  $[[R0:[0-9]+]], %got_page($CPI0_0)

; PIC-N64: lwc1 $f0, %got_ofst($CPI0_0)($[[R0]])

; STATIC-N64: ld  $[[R0:[0-9]+]], %got_page($CPI0_0)

; STATIC-N64: lwc1 $f0, %got_ofst($CPI0_0)($[[R0]])

; PIC-N32: lw  $[[R0:[0-9]+]], %got_page(.LCPI0_0)

; PIC-N32: lwc1 $f0, %got_ofst(.LCPI0_0)($[[R0]])

; STATIC-N32: lui  $[[R0:[0-9]+]], %hi(.LCPI0_0)

; STATIC-N32: lwc1 $f0, %lo(.LCPI0_0)($[[R0]])

; PIC-N64: ld  $[[R0:[0-9]+]], %got_page(.LCPI0_0)

; PIC-N64: lwc1 $f0, %got_ofst(.LCPI0_0)($[[R0]])

; STATIC-N64: ld  $[[R0:[0-9]+]], %got_page(.LCPI0_0)

; STATIC-N64: lwc1 $f0, %got_ofst(.LCPI0_0)($[[R0]])

  ret float 0x400B333340000000

}

llvm/test/CodeGen/Mips/2010-07-20-Switch.ll

+3 −3
Original line number Diff line number Diff line
@@ -27,9 +27,9 @@ entry: 
; PIC-O32: addu $[[R5:[0-9]+]], $[[R4:[0-9]+]]

; PIC-O32: jr  $[[R5]]

; N64: dsll $[[R0:[0-9]+]], ${{[0-9]+}}, 3

; N64: ld $[[R1:[0-9]+]], %got_page($JTI0_0)

; N64: ld $[[R1:[0-9]+]], %got_page(.LJTI0_0)

; N64: daddu $[[R2:[0-9]+]], $[[R0:[0-9]+]], $[[R1]]

; N64: ld $[[R4:[0-9]+]], %got_ofst($JTI0_0)($[[R2]])

; N64: ld $[[R4:[0-9]+]], %got_ofst(.LJTI0_0)($[[R2]])

; N64: daddu $[[R5:[0-9]+]], $[[R4:[0-9]+]]

; N64: jr  $[[R5]]

  switch i32 %0, label %bb4 [
@@ -68,7 +68,7 @@ bb5: ; preds = %entry 
; PIC-O32: .gpword 

; PIC-O32: .gpword 

; N64: .p2align  3

; N64: $JTI0_0:

; N64: .LJTI0_0:

; N64: .gpdword

; N64: .gpdword

; N64: .gpdword

llvm/test/CodeGen/Mips/analyzebranch.ll

+3 −3
Original line number Diff line number Diff line
@@ -10,7 +10,7 @@ define double @foo(double %a, double %b) nounwind readnone { 
entry:

; ALL-LABEL: foo:



; FCC:           bc1f $BB

; FCC:           bc1f {{\$|\.L}}BB

; FCC:           nop



; 32-GPR:        mtc1      $zero, $[[Z:f[0-9]]]
@@ -19,7 +19,7 @@ entry: 
; GPR:           cmp.lt.d  $[[FGRCC:f[0-9]+]], $[[Z]], $f12

; GPR:           mfc1      $[[GPRCC:[0-9]+]], $[[FGRCC]]

; GPR-NOT:       not       $[[GPRCC]], $[[GPRCC]]

; GPR:           bnezc     $[[GPRCC]], $BB

; GPR:           bnezc     $[[GPRCC]], {{\$|\.L}}BB



  %cmp = fcmp ogt double %a, 0.000000e+00

  br i1 %cmp, label %if.end6, label %if.else
@@ -43,7 +43,7 @@ define void @f1(float %f) nounwind { 
entry:

; ALL-LABEL: f1:



; FCC:           bc1f $BB

; FCC:           bc1f {{\$|\.L}}BB

; FCC:           nop



; GPR:           mtc1     $zero, $[[Z:f[0-9]]]