Commit 0c14c942 authored by Hans Wennborg's avatar Hans Wennborg
Browse files

Merging r325525: 

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r325525 | steven_wu | 2018-02-19 20:22:28 +0100 (Mon, 19 Feb 2018) | 13 lines

bitcode support change for fast flags compatibility

Summary: The discussion and as per need, each vendor needs a way to keep the old fast flags and the new fast flags in the auto upgrade path of the IR upgrader.  This revision addresses that issue.

Patched by Michael Berg

Reviewers: qcolombet, hans, steven_wu

Reviewed By: qcolombet, steven_wu

Subscribers: dexonsmith, vsk, mehdi_amini, andrewrk, MatzeB, wristow, spatel

Differential Revision: https://reviews.llvm.org/D43253
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llvm-svn: 325592
parent 5bd09dd5

llvm/include/llvm/Bitcode/LLVMBitCodes.h

+14 −0
Original line number Diff line number Diff line
@@ -395,6 +395,20 @@ enum OverflowingBinaryOperatorOptionalFlags { 
  OBO_NO_SIGNED_WRAP = 1

};



/// FastMath Flags

/// This is a fixed layout derived from the bitcode emitted by LLVM 5.0

/// intended to decouple the in-memory representation from the serialization.

enum FastMathMap {

  UnsafeAlgebra   = (1 << 0), // Legacy

  NoNaNs          = (1 << 1),

  NoInfs          = (1 << 2),

  NoSignedZeros   = (1 << 3),

  AllowReciprocal = (1 << 4),

  AllowContract   = (1 << 5),

  ApproxFunc      = (1 << 6),

  AllowReassoc    = (1 << 7)

};



/// PossiblyExactOperatorOptionalFlags - Flags for serializing

/// PossiblyExactOperator's SubclassOptionalData contents.

enum PossiblyExactOperatorOptionalFlags { PEO_EXACT = 0 };

llvm/lib/Bitcode/Reader/BitcodeReader.cpp

+9 −7
Original line number Diff line number Diff line
@@ -1046,19 +1046,21 @@ static Comdat::SelectionKind getDecodedComdatSelectionKind(unsigned Val) { 


static FastMathFlags getDecodedFastMathFlags(unsigned Val) {

  FastMathFlags FMF;

  if (0 != (Val & FastMathFlags::AllowReassoc))

  if (0 != (Val & bitc::UnsafeAlgebra))

    FMF.setFast();

  if (0 != (Val & bitc::AllowReassoc))

    FMF.setAllowReassoc();

  if (0 != (Val & FastMathFlags::NoNaNs))

  if (0 != (Val & bitc::NoNaNs))

    FMF.setNoNaNs();

  if (0 != (Val & FastMathFlags::NoInfs))

  if (0 != (Val & bitc::NoInfs))

    FMF.setNoInfs();

  if (0 != (Val & FastMathFlags::NoSignedZeros))

  if (0 != (Val & bitc::NoSignedZeros))

    FMF.setNoSignedZeros();

  if (0 != (Val & FastMathFlags::AllowReciprocal))

  if (0 != (Val & bitc::AllowReciprocal))

    FMF.setAllowReciprocal();

  if (0 != (Val & FastMathFlags::AllowContract))

  if (0 != (Val & bitc::AllowContract))

    FMF.setAllowContract(true);

  if (0 != (Val & FastMathFlags::ApproxFunc))

  if (0 != (Val & bitc::ApproxFunc))

    FMF.setApproxFunc();

  return FMF;

}

llvm/lib/Bitcode/Writer/BitcodeWriter.cpp

+8 −8
Original line number Diff line number Diff line
@@ -1330,19 +1330,19 @@ static uint64_t getOptimizationFlags(const Value *V) { 
      Flags |= 1 << bitc::PEO_EXACT;

  } else if (const auto *FPMO = dyn_cast<FPMathOperator>(V)) {

    if (FPMO->hasAllowReassoc())

      Flags |= FastMathFlags::AllowReassoc;

      Flags |= bitc::AllowReassoc;

    if (FPMO->hasNoNaNs())

      Flags |= FastMathFlags::NoNaNs;

      Flags |= bitc::NoNaNs;

    if (FPMO->hasNoInfs())

      Flags |= FastMathFlags::NoInfs;

      Flags |= bitc::NoInfs;

    if (FPMO->hasNoSignedZeros())

      Flags |= FastMathFlags::NoSignedZeros;

      Flags |= bitc::NoSignedZeros;

    if (FPMO->hasAllowReciprocal())

      Flags |= FastMathFlags::AllowReciprocal;

      Flags |= bitc::AllowReciprocal;

    if (FPMO->hasAllowContract())

      Flags |= FastMathFlags::AllowContract;

      Flags |= bitc::AllowContract;

    if (FPMO->hasApproxFunc())

      Flags |= FastMathFlags::ApproxFunc;

      Flags |= bitc::ApproxFunc;

  }



  return Flags;
@@ -3183,7 +3183,7 @@ void ModuleBitcodeWriter::writeBlockInfo() { 
    Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::VBR, 6)); // LHS

    Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::VBR, 6)); // RHS

    Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 4)); // opc

    Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 7)); // flags

    Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 8)); // flags

    if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID, Abbv) !=

        FUNCTION_INST_BINOP_FLAGS_ABBREV)

      llvm_unreachable("Unexpected abbrev ordering!");

llvm/test/Bitcode/compatibility-3.6.ll

+1 −3
Original line number Diff line number Diff line
@@ -612,9 +612,7 @@ define void @fastmathflags(float %op1, float %op2) { 
  %f.arcp = fadd arcp float %op1, %op2

  ; CHECK: %f.arcp = fadd arcp float %op1, %op2

  %f.fast = fadd fast float %op1, %op2

  ; 'fast' used to be its own bit, but this changed in Oct 2017.

  ; The binary test file does not have the newer 'contract' and 'afn' bits set, so this is not fully 'fast'.

  ; CHECK: %f.fast = fadd reassoc nnan ninf nsz arcp float %op1, %op2

  ; CHECK: %f.fast = fadd fast float %op1, %op2

  ret void

}

llvm/test/Bitcode/compatibility-3.7.ll

+1 −3
Original line number Diff line number Diff line
@@ -656,9 +656,7 @@ define void @fastmathflags(float %op1, float %op2) { 
  %f.arcp = fadd arcp float %op1, %op2

  ; CHECK: %f.arcp = fadd arcp float %op1, %op2

  %f.fast = fadd fast float %op1, %op2

  ; 'fast' used to be its own bit, but this changed in Oct 2017.

  ; The binary test file does not have the newer 'contract' and 'afn' bits set, so this is not fully 'fast'.

  ; CHECK: %f.fast = fadd reassoc nnan ninf nsz arcp float %op1, %op2

  ; CHECK: %f.fast = fadd fast float %op1, %op2

  ret void

}