Commit 0bb5f10a authored by Hans Wennborg's avatar Hans Wennborg
Browse files

Merging r325654: 

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r325654 | ctopper | 2018-02-21 01:15:48 +0100 (Wed, 21 Feb 2018) | 10 lines

[X86] Disable CLWB for Cannon Lake

Cannon Lake does not support CLWB, therefore it
does not include all features listed under SKX anymore.

Instead, enumerate all SKX features with the exception of CLWB.

Patch by Gabor Buella

Differential Revision: https://reviews.llvm.org/D43380
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llvm-svn: 325671
parent 03a71737

llvm/lib/Target/X86/X86.td

+7 −1
Original line number Diff line number Diff line
@@ -740,7 +740,13 @@ class SkylakeServerProc<string Name> : ProcModel<Name, SkylakeServerModel, 
def : SkylakeServerProc<"skylake-avx512">;

def : SkylakeServerProc<"skx">; // Legacy alias.



def CNLFeatures : ProcessorFeatures<SKXFeatures.Value, [

def CNLFeatures : ProcessorFeatures<SKLFeatures.Value, [

  FeatureAVX512,

  FeatureCDI,

  FeatureDQI,

  FeatureBWI,

  FeatureVLX,

  FeaturePKU,

  FeatureVBMI,

  FeatureIFMA,

  FeatureSHA

llvm/test/CodeGen/X86/clwb.ll

+7 −0
Original line number Diff line number Diff line 
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py

; NOTE: clwb is available in Skylake Server, not available in the newer

; NOTE: Cannon Lake arch, but available again in the newer Ice Lake arch.

; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=clwb | FileCheck %s

; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=skx | FileCheck %s

; RUN: not llc < %s -mtriple=i686-apple-darwin -mcpu=cannonlake 2>&1 | FileCheck %s --check-prefix=CNL

; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=icelake | FileCheck %s



; CNL: LLVM ERROR: Cannot select: intrinsic %llvm.x86.clwb



define void @clwb(i8* %p) nounwind {

; CHECK-LABEL: clwb: