Commit 06ec1ff2 authored by Jingu Kang's avatar Jingu Kang
Browse files

[AArch64] Replace uaddlv intrinsic with uaddlv sdnode 

Differential Revision: https://reviews.llvm.org/D159447
parent 282bf213

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

+6 −6
Original line number Diff line number Diff line
@@ -8740,9 +8740,9 @@ SDValue AArch64TargetLowering::LowerCTPOP_PARITY(SDValue Op, 
    Val = DAG.getNode(ISD::BITCAST, DL, MVT::v8i8, Val);















    SDValue CtPop = DAG.getNode(ISD::CTPOP, DL, MVT::v8i8, Val);













    SDValue UaddLV = DAG.getNode(













        ISD::INTRINSIC_WO_CHAIN, DL, MVT::i32,













        DAG.getConstant(Intrinsic::aarch64_neon_uaddlv, DL, MVT::i32), CtPop);













    SDValue UaddLV = DAG.getNode(AArch64ISD::UADDLV, DL, MVT::v4i32, CtPop);













    UaddLV = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, UaddLV,













                         DAG.getConstant(0, DL, MVT::i64));





























    if (IsParity)















      UaddLV = DAG.getNode(ISD::AND, DL, MVT::i32, UaddLV,









@@ -8755,9 +8755,9 @@ SDValue AArch64TargetLowering::LowerCTPOP_PARITY(SDValue Op,













    Val = DAG.getNode(ISD::BITCAST, DL, MVT::v16i8, Val);





























    SDValue CtPop = DAG.getNode(ISD::CTPOP, DL, MVT::v16i8, Val);













    SDValue UaddLV = DAG.getNode(













        ISD::INTRINSIC_WO_CHAIN, DL, MVT::i32,













        DAG.getConstant(Intrinsic::aarch64_neon_uaddlv, DL, MVT::i32), CtPop);













    SDValue UaddLV = DAG.getNode(AArch64ISD::UADDLV, DL, MVT::v4i32, CtPop);













    UaddLV = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, UaddLV,













                         DAG.getConstant(0, DL, MVT::i64));





























    if (IsParity)















      UaddLV = DAG.getNode(ISD::AND, DL, MVT::i32, UaddLV,