Commit 66050579 authored by Simon Pilgrim's avatar Simon Pilgrim
Browse files

Revert rG7c66aadd "[DAG] Fold (X & Y) != 0 -->...

Revert rG7c66aadd "[DAG] Fold (X & Y) != 0 --> zextOrTrunc(X & Y) iff everything but LSB is known zero (PR51312)"

Noticed a typo in the getBooleanContents call just after I pressed commit :(
parent d2e8fb33
...@@ -3254,29 +3254,17 @@ bool TargetLowering::isExtendedTrueVal(const ConstantSDNode *N, EVT VT, ...@@ -3254,29 +3254,17 @@ bool TargetLowering::isExtendedTrueVal(const ConstantSDNode *N, EVT VT,
SDValue TargetLowering::foldSetCCWithAnd(EVT VT, SDValue N0, SDValue N1, SDValue TargetLowering::foldSetCCWithAnd(EVT VT, SDValue N0, SDValue N1,
ISD::CondCode Cond, const SDLoc &DL, ISD::CondCode Cond, const SDLoc &DL,
DAGCombinerInfo &DCI) const { DAGCombinerInfo &DCI) const {
// Match these patterns in any of their permutations:
// (X & Y) == Y
// (X & Y) != Y
if (N1.getOpcode() == ISD::AND && N0.getOpcode() != ISD::AND) if (N1.getOpcode() == ISD::AND && N0.getOpcode() != ISD::AND)
std::swap(N0, N1); std::swap(N0, N1);
SelectionDAG &DAG = DCI.DAG;
EVT OpVT = N0.getValueType(); EVT OpVT = N0.getValueType();
if (N0.getOpcode() != ISD::AND || !OpVT.isInteger() || if (N0.getOpcode() != ISD::AND || !OpVT.isInteger() ||
(Cond != ISD::SETEQ && Cond != ISD::SETNE)) (Cond != ISD::SETEQ && Cond != ISD::SETNE))
return SDValue(); return SDValue();
// (X & Y) != 0 --> zextOrTrunc(X & Y)
// iff everything but LSB is known zero:
if (Cond == ISD::SETNE && isNullConstant(N1) &&
(getBooleanContents(VT) == TargetLowering::UndefinedBooleanContent ||
getBooleanContents(VT) == TargetLowering::ZeroOrOneBooleanContent)) {
unsigned NumEltBits = OpVT.getScalarSizeInBits();
APInt UpperBits = APInt::getHighBitsSet(NumEltBits, NumEltBits - 1);
if (DAG.MaskedValueIsZero(N0, UpperBits))
return DAG.getBoolExtOrTrunc(N0, DL, VT, OpVT);
}
// Match these patterns in any of their permutations:
// (X & Y) == Y
// (X & Y) != Y
SDValue X, Y; SDValue X, Y;
if (N0.getOperand(0) == N1) { if (N0.getOperand(0) == N1) {
X = N0.getOperand(1); X = N0.getOperand(1);
...@@ -3288,6 +3276,7 @@ SDValue TargetLowering::foldSetCCWithAnd(EVT VT, SDValue N0, SDValue N1, ...@@ -3288,6 +3276,7 @@ SDValue TargetLowering::foldSetCCWithAnd(EVT VT, SDValue N0, SDValue N1,
return SDValue(); return SDValue();
} }
SelectionDAG &DAG = DCI.DAG;
SDValue Zero = DAG.getConstant(0, DL, OpVT); SDValue Zero = DAG.getConstant(0, DL, OpVT);
if (DAG.isKnownToBeAPowerOfTwo(Y)) { if (DAG.isKnownToBeAPowerOfTwo(Y)) {
// Simplify X & Y == Y to X & Y != 0 if Y has exactly one bit set. // Simplify X & Y == Y to X & Y != 0 if Y has exactly one bit set.
......
...@@ -36,8 +36,8 @@ define i1 @canonical_parity(<16 x i1> %x) { ...@@ -36,8 +36,8 @@ define i1 @canonical_parity(<16 x i1> %x) {
; POPCNT-NEXT: psllw $7, %xmm0 ; POPCNT-NEXT: psllw $7, %xmm0
; POPCNT-NEXT: pmovmskb %xmm0, %eax ; POPCNT-NEXT: pmovmskb %xmm0, %eax
; POPCNT-NEXT: popcntl %eax, %eax ; POPCNT-NEXT: popcntl %eax, %eax
; POPCNT-NEXT: andl $1, %eax ; POPCNT-NEXT: testb $1, %al
; POPCNT-NEXT: # kill: def $al killed $al killed $eax ; POPCNT-NEXT: setne %al
; POPCNT-NEXT: retq ; POPCNT-NEXT: retq
%i1 = bitcast <16 x i1> %x to i16 %i1 = bitcast <16 x i1> %x to i16
%i2 = call i16 @llvm.ctpop.i16(i16 %i1) %i2 = call i16 @llvm.ctpop.i16(i16 %i1)
......
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