Commit 71d5454b authored by Simon Tatham's avatar Simon Tatham
Browse files

[ARM,MVE] Use the new Tablegen `defvar` and `if` statements.

Summary:
This cleans up a lot of ugly `foreach` bodges that I've been using to
work around the lack of those two language features. Now they both
exist, I can make then all into something more legible!

In particular, in the common pattern in `ARMInstrMVE.td` where a
multiclass defines an `Instruction` instance plus one or more `Pat` that
select it, I've used a `defvar` to wrap `!cast<Instruction>(NAME)` so
that the patterns themselves become a little more legible.

Replacing a `foreach` with a `defvar` removes a level of block
structure, so several pieces of code have their indentation changed by
this patch. Best viewed with whitespace ignored.

NFC: the output of `llvm-tblgen -print-records` on the two affected
Tablegen sources is exactly identical before and after this change, so
there should be no effect at all on any of the other generated files.

Reviewers: MarkMurrayARM, miyuki

Reviewed By: MarkMurrayARM

Subscribers: kristof.beyls, hiraditya, dmgreen, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D72690
parent 877723b7
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+27 −31
Original line number Diff line number Diff line
@@ -212,20 +212,17 @@ def vmaxvq: Intrinsic<Scalar, (args Scalar:$prev, Vector:$vec),
    (Scalar (IRInt<"maxv", [Vector], 1> $prev, $vec))>;
}

foreach half = [ "b", "t" ] in
foreach halfconst = [ !if(!eq(half, "b"), 0, 1) ] in {
foreach half = [ "b", "t" ] in {
  defvar halfconst = !if(!eq(half, "b"), 0, 1);

  let params = [f32], pnt = PNT_None in {

    def vcvt#half#q_f16: Intrinsic<
      VecOf<f16>, (args VecOf<f16>:$inactive, Vector:$a),
      (IRInt<"vcvt_narrow"> $inactive, $a, halfconst)>;
    def vcvt#half#q_m_f16: Intrinsic<
      VecOf<f16>, (args VecOf<f16>:$inactive, Vector:$a, PredOf<f32>:$pred),
      (IRInt<"vcvt_narrow_predicated"> $inactive, $a, halfconst, $pred)>;

  } // params = [f32], pnt = PNT_None

} // loop over half = "b", "t"

multiclass compare_with_pred<string condname, dag arguments,
@@ -653,8 +650,9 @@ defm vshlltq : vshll_imm<1>;

multiclass DyadicImmShift<Type outtype, Immediate imm, string intname = NAME,
                          dag extraargs = (?)> {
  foreach intparams = [!if(!eq(!cast<string>(outtype), !cast<string>(Vector)),
                           [Vector], [outtype, Vector])] in {
  defvar intparams = !if(!eq(!cast<string>(outtype), !cast<string>(Vector)),
                         [Vector], [outtype, Vector]);

  def q_n: Intrinsic<
      outtype, (args outtype:$a, Vector:$b, imm:$sh),
      !con((IRInt<intname, intparams> $a, $b, $sh), extraargs)>;
@@ -664,7 +662,6 @@ multiclass DyadicImmShift<Type outtype, Immediate imm, string intname = NAME,
      !con((IRInt<intname # "_predicated", intparams # [Predicate]>
               $a, $b, $sh), extraargs, (? $pred))>;
}
}

multiclass VSHRN<Type outtype, Immediate imm, dag extraargs> {
  defm b: DyadicImmShift<outtype, imm, "vshrn", !con(extraargs, (? 0))>;
@@ -672,13 +669,12 @@ multiclass VSHRN<Type outtype, Immediate imm, dag extraargs> {
}

let params = [s16, s32, u16, u32], pnt = PNT_NType in {
  foreach U = [(unsignedflag Scalar)] in {
  defvar U = (unsignedflag Scalar);
  defm vshrn   : VSHRN<HalfVector, imm_1toHalfN, (? 0,0,U,U)>;
  defm vqshrn  : VSHRN<HalfVector, imm_1toHalfN, (? 1,0,U,U)>;
  defm vrshrn  : VSHRN<HalfVector, imm_1toHalfN, (? 0,1,U,U)>;
  defm vqrshrn : VSHRN<HalfVector, imm_1toHalfN, (? 1,1,U,U)>;
}
}
let params = [s16, s32], pnt = PNT_NType in {
  defm vqshrun  : VSHRN<UHalfVector, imm_1toHalfN, (? 1,0,1,0)>;
  defm vqrshrun : VSHRN<UHalfVector, imm_1toHalfN, (? 1,1,1,0)>;
+232 −253

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