gn build: add RISCV target (2aa3f3d4) · Commits · Cabrera, Anthony / llvm-project

llvm/utils/gn/secondary/llvm/lib/Target/RISCV/AsmParser/BUILD.gn

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		import("//llvm/utils/TableGen/tablegen.gni")

		tablegen("RISCVGenAsmMatcher") {
		visibility = [ ":AsmParser" ]
		args = [ "-gen-asm-matcher" ]
		td_file = "../RISCV.td"
		}

		static_library("AsmParser") {
		output_name = "LLVMRISCVAsmParser"
		deps = [
		":RISCVGenAsmMatcher",
		"//llvm/lib/MC",
		"//llvm/lib/MC/MCParser",
		"//llvm/lib/Support",
		"//llvm/lib/Target/RISCV:RISCVGenCompressInstEmitter",
		"//llvm/lib/Target/RISCV/MCTargetDesc",
		"//llvm/lib/Target/RISCV/Utils",
		]
		include_dirs = [ ".." ]
		sources = [
		"RISCVAsmParser.cpp",
		]
		}

llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn

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		import("//llvm/utils/TableGen/tablegen.gni")

		# RISCV is the only target that has a "compress instr emitter", and it's
		# a bit strange in that it defines static functions depending on which
		# defines are set. Instead of housing these functions in one library,
		# various libraries include the generated .inc file with different defines set.
		tablegen("RISCVGenCompressInstEmitter") {
		visibility = [
		":LLVMRISCVCodeGen",
		"AsmParser",
		"MCTargetDesc",
		]
		args = [ "-gen-compress-inst-emitter" ]
		td_file = "RISCV.td"
		}

		tablegen("RISCVGenDAGISel") {
		visibility = [ ":LLVMRISCVCodeGen" ]
		args = [ "-gen-dag-isel" ]
		td_file = "RISCV.td"
		}

		tablegen("RISCVGenMCPseudoLowering") {
		visibility = [ ":LLVMRISCVCodeGen" ]
		args = [ "-gen-pseudo-lowering" ]
		td_file = "RISCV.td"
		}

		static_library("LLVMRISCVCodeGen") {
		deps = [
		":RISCVGenCompressInstEmitter",
		":RISCVGenDAGISel",
		":RISCVGenMCPseudoLowering",
		"MCTargetDesc",
		"TargetInfo",
		"Utils",
		"//llvm/include/llvm/Config:llvm-config",
		"//llvm/lib/CodeGen",
		"//llvm/lib/CodeGen/AsmPrinter",
		"//llvm/lib/CodeGen/SelectionDAG",
		"//llvm/lib/IR",
		"//llvm/lib/MC",
		"//llvm/lib/Support",
		"//llvm/lib/Target",
		]
		include_dirs = [ "." ]
		sources = [
		"RISCVAsmPrinter.cpp",
		"RISCVExpandPseudoInsts.cpp",
		"RISCVFrameLowering.cpp",
		"RISCVISelDAGToDAG.cpp",
		"RISCVISelLowering.cpp",
		"RISCVInstrInfo.cpp",
		"RISCVMCInstLower.cpp",
		"RISCVMergeBaseOffset.cpp",
		"RISCVRegisterInfo.cpp",
		"RISCVSubtarget.cpp",
		"RISCVTargetMachine.cpp",
		"RISCVTargetObjectFile.cpp",
		]
		}

		# This is a bit different from most build files: Due to this group
		# having the directory's name, "//llvm/lib/Target/RISCV" will refer to this
		# target, which pulls in the code in this directory and all subdirectories.
		# For most other directories, "//llvm/lib/Foo" only pulls in the code directly
		# in "llvm/lib/Foo". The forwarding targets in //llvm/lib/Target expect this
		# different behavior.
		group("RISCV") {
		deps = [
		":LLVMRISCVCodeGen",
		"AsmParser",
		"Disassembler",
		"MCTargetDesc",
		"TargetInfo",
		"Utils",
		]
		}

llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Disassembler/BUILD.gn

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		import("//llvm/utils/TableGen/tablegen.gni")

		tablegen("RISCVGenDisassemblerTables") {
		visibility = [ ":Disassembler" ]
		args = [ "-gen-disassembler" ]
		td_file = "../RISCV.td"
		}

		static_library("Disassembler") {
		output_name = "LLVMRISCVDisassembler"
		deps = [
		":RISCVGenDisassemblerTables",
		"//llvm/lib/MC/MCDisassembler",
		"//llvm/lib/Support",
		"//llvm/lib/Target/RISCV/MCTargetDesc",
		"//llvm/lib/Target/RISCV/Utils",
		]
		include_dirs = [ ".." ]
		sources = [
		"RISCVDisassembler.cpp",
		]
		}

llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCTargetDesc/BUILD.gn

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		import("//llvm/utils/TableGen/tablegen.gni")

		tablegen("RISCVGenAsmWriter") {
		visibility = [ ":MCTargetDesc" ]
		args = [ "-gen-asm-writer" ]
		td_file = "../RISCV.td"
		}

		tablegen("RISCVGenInstrInfo") {
		visibility = [ ":tablegen" ]
		args = [ "-gen-instr-info" ]
		td_file = "../RISCV.td"
		}

		tablegen("RISCVGenMCCodeEmitter") {
		visibility = [ ":MCTargetDesc" ]
		args = [ "-gen-emitter" ]
		td_file = "../RISCV.td"
		}

		tablegen("RISCVGenRegisterInfo") {
		visibility = [ ":tablegen" ]
		args = [ "-gen-register-info" ]
		td_file = "../RISCV.td"
		}

		tablegen("RISCVGenSubtargetInfo") {
		visibility = [ ":tablegen" ]
		args = [ "-gen-subtarget" ]
		td_file = "../RISCV.td"
		}

		# This should contain tablegen targets generating .inc files included
		# by other targets. .inc files only used by .cpp files in this directory
		# should be in deps on the static_library instead.
		group("tablegen") {
		visibility = [
		":MCTargetDesc",
		"../Utils",
		]
		public_deps = [
		":RISCVGenInstrInfo",
		":RISCVGenRegisterInfo",
		":RISCVGenSubtargetInfo",
		]
		}

		static_library("MCTargetDesc") {
		output_name = "LLVMRISCVDesc"
		public_deps = [
		":tablegen",
		]
		deps = [
		":RISCVGenAsmWriter",
		":RISCVGenMCCodeEmitter",
		"//llvm/lib/MC",
		"//llvm/lib/Support",
		"//llvm/lib/Target/RISCV:RISCVGenCompressInstEmitter",
		"//llvm/lib/Target/RISCV/Utils",
		]
		include_dirs = [ ".." ]
		sources = [
		"RISCVAsmBackend.cpp",
		"RISCVELFObjectWriter.cpp",
		"RISCVELFStreamer.cpp",
		"RISCVInstPrinter.cpp",
		"RISCVMCAsmInfo.cpp",
		"RISCVMCCodeEmitter.cpp",
		"RISCVMCExpr.cpp",
		"RISCVMCTargetDesc.cpp",
		"RISCVTargetStreamer.cpp",
		]
		}

llvm/utils/gn/secondary/llvm/lib/Target/RISCV/TargetInfo/BUILD.gn

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		static_library("TargetInfo") {
		output_name = "LLVMRISCVInfo"
		deps = [
		"//llvm/lib/Support",
		]
		include_dirs = [ ".." ]
		sources = [
		"RISCVTargetInfo.cpp",
		]
		}