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commercial prototypes. It can be used to model technology nodes ranging from 22nm to 180nm.
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Thus, DESTINY is intended to be a comprehensive tool.
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Matthew Poremba and Sparsh Mittal are lead-developers of DESTINY.
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Sparsh Mittal and Matthew Poremba are lead-developers of DESTINY.
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DESTINY utilizes the framework for modeling 2D SRAM and 2D NVM from NVSim.
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Also, the coarse- and fine-grained TSV (through silicon via) models are utilized from CACTI-3DD.
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### Documentation
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The file ''DESTINY_Documentation'' under the folder 'Doc' provides a brief manual of DESTINY. It shows an example configuration file and the corresponding output of DESTINY, which may be especially useful for a user who wants to get an overview of DESTINY before installing it. The manual also provides ideas and suggestions for integrating DESTINY into architectural simulators and is expected to answer some of the ``frequently asked questions'' related to DESTINY.
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### Sponsors
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This work was supported by the Office of Advanced Scientific Computing Research in
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### Hacking DESTINY code and possible extensions
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We expect that end-users of DESTINY should be able to easily modify it to add
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various features. We are also working to add new features to it and provide a documentation.
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various features. We are also working to add new features to it.
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Some possible extensions to DESTINY include, adding MLC (multi-level cell) modeling capability,
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modeling other memory technologies such as race-track memory (domain wall memory) etc.
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